Interleaved forward voltage converters, also known as push-push converters, are known in the art. FIG. 1 shows an example of a prior art interleaved forward voltage converter, shown generally as 100. In the converter 100, a source of input voltage Vin is coupled to a positive terminal of a first transformer T1 of the first converter stage. The other terminal of transformer T1 is connected to ground through a first switching transistor Q1. The transistor Q1 is driven by a pulse generator 102. A secondary winding of a transformer T1 has a negative terminal connected to ground the positive terminal connected to one terminal of a filter inductor Lf through diode Df1. A second converter stage comprising transformer T2 has a positive terminal of the primary winding connected to the source of voltage and a second negative terminal connected to ground through transistor Q2. The gate of transistor Q2 is driven by pulse generator 106. The secondary winding of transformer T2 has a negative terminal connected to ground and a positive terminal connected to the input terminal of filter inductor Lf through diode Df2. The diode Df1 and Df2 are connected at node Vfilt. A freewheeling diode Dfw is connected to this node and a load, here shown as a resistor R1, is connected to the terminal on the other side of inductor Lf. An output capacitor Co is coupled across the load resistor R1.
Transistors Q1 and Q2 are switched 180° out of phase from each other and output voltage regulation is by way of pulse width modulation (PWM) of the gate drive signals (not shown). Operation of the circuit shown in FIG. 1 will now be explained in connection with FIG. 2 where the duty cycle of transistors Q1 and Q2 is 30%. In FIG. 2, the waveforms for operation of the circuit at 30% duty cycle are shown generally as 200. The currents through transistors Q1 and Q2 are shown by the waveforms I(Q1) and I(Q2). The current through the freewheeling diode Dfw is shown by the waveform I (Dfw). The voltage at the node Vfilt is shown as Vfilt and the output voltage is shown as Vout. The voltage at Vout is shown on an expanded voltage scale so that the ripple can be seen. At this duty cycle, the voltages generated by the first converter and the second converter add at the terminal Dfilt and an increased voltage is available at the terminal Vout.
Operation of the circuit shown in FIG. 1 will now be explained in connection with FIG. 3 where the duty cycle of transistors Q1 and Q2 is 70%. The same waveforms are shown in FIG. 3 as were shown in FIG. 2, generally as 300. We see that although the duty cycles of the two transistors cause them to overlap in their ON time, the current through the transistors to not overlap, and no additional voltage is generated at the node Vfilt during the period of overlap. The current through the freewheeling diode and the voltage at both the node Vfilt and Vout are pure DC.
The output voltage for this conventional interleaved forward voltage converter is:Vout=(Vin/N)·2·D for D less than 0.5  (equation 1)Vout=(Vin/N) for D greater than 0.5  (equation 2)
Where
Vin is the input voltage
Vout is the output voltage
N is the turns ratio of the transformers and
D is the duty cycle for the transistors Q1 and Q2
Thus, once the duty cycle exceeds 50%, there can be no increase in the output voltage.
Therefore, there is a need for a voltage converter having greater flexibility for generating an output voltage.